1. Field of the Invention
The present invention relates to an inspection system used during fabrication of semiconductor devices, and more particularly, to a wafer inspection system used for inspecting visual defects of a wafer.
2. Description of the Related Art
Fabrication yields of semiconductor devices continue to improve. One contributing factor is the improvement in the fabrication equipment itself and fabrication technology in general. In-line monitoring methods applied during the fabrication process have also been a big contributor to improved fabrication yields.
When conventional indirect monitoring methods are used for inspecting defects which arise during the semiconductor fabrication process, it is difficult to immediately take measures to deal with problems as they occur. However, with in-line monitoring, a wafer is inspected at every process step using a wafer inspection system. Accordingly, random or irregular equipment defects occurring during device fabrication can be immediately detected based on the inspection result obtained from the wafer inspection system at each process step so that a process can be immediately normalized even if defects occur. With in-line monitoring, defects are promptly discovered and measured, thereby maximizing yield. Moreover, waste in production cost caused by the occurrence of defects is reduced, thereby minimizing production cost.
During in-line monitoring, the wafer inspection system inspects visual defects of a wafer using a laser or an optic system to detect the sizes, shapes, colors, density and positions of defects and defect clusters on the wafer.
FIG. 1 is a schematic view for explaining a data processing method of a wafer inspection system using a conventional optical image. Referring to FIG. 1, an image of a wafer 10, which has a conductive pattern such as a metal pattern or an impurity doped polysilicon pattern, is sensed by an image sensor 30 using an optic system 20 in step 40. To facilitate digital processing with a computer, the sensed image is converted from an analog signal to a digital signal in step 50. The digitized image is filtered and compared with a reference image by an image processing computer 60 to extract defects contained in the image.
Specifically, the image processing computer 60 detects the sizes, colors and shapes of the extracted defects and identifies the density and positions of the defects. In accordance with the image which is obtained by completing the identification of the defects, the defects are clustered and classified in a review station 70, which is provided in an in-line or an off-line manner with respect to the wafer inspection system. After finishing the classification of the defects, a defect file 80 is generated for the wafer 10 which is under inspection. The defect file 80 is used for fabrication process monitoring or control.
FIG. 2 is a plan view for explaining a defect sensing method in a wafer inspection system using a conventional optical image. Referring to FIG. 2, an image processing computer using an optical system (such as described for FIG. 1) adopts a method of comparing an image 10a of a wafer to be inspected, with a reference image 10b. A conductive pattern image 71, which is normally formed on a chip, in the reference image 10b counterbalances that of the image 10a to be inspected so that only abnormal defect images will be extracted. Then, the number and locations of the extracted defects are sensed. After comparing and counterbalancing the two images 10a and 10b, four defects 65, 67, 69 and 73 are extracted as a whole in FIG. 2.
The defects 65, 67, 69 and 73 are classified into two categories: fatal defects which directly influence the operation of a chip formed on a wafer, and non-fatal defects whose influence is relatively slight. In other words, there exists a conductive pattern defect, e.g., the defect 73, which causes shorting to occur between the conductive patterns and makes the operation of a chip impossible, and non-conductive pattern defects, e.g., the defects 65, 67 or 69, which are removable through succeeding processes such as a cleaning process and/or forced air blowing processes.
This conventional wafer inspection system has the following problems. Primarily, in some cases, hundreds to tens of thousands of non-fatal defects may be contained in an image to be inspected. These non-fatal defects are identified and classified at a review station using a microscope or a scanning electron microscope (SEM). Moreover, large variations can occur during operations depending on an operators"" skills and experience. In addition, too much time, effort and cost are required, thereby decreasing the inspection efficiency of a wafer inspection system.
In the meantime, since the minimum size of an image defect which can be sensed by an optic system is limited to 0.1-0.2 xcexcm, it becomes more difficult to identify and extract defects as semiconductor devices become more highly integrated. If the size of a pixel of an image is decreased to solve the resolution problem in a wafer inspection system for highly integrated semiconductor devices, the throughput time of an image processing computer will be increased, so that the operating efficiency of the wafer inspection system may be decreased.
To solve the above problems, it is an objective of the present invention to provide a wafer inspection system for selectively inspecting conductive pattern defects by extracting visual defects depending on the quality of defects contained in a conductive pattern on a wafer, without using an optical system or a laser system, thereby improving the operating efficiency of the equipment.
It is another objective of the present invention to provide an inspection method using the wafer inspection system for selectively inspecting conductive pattern defects.
Accordingly, to achieve the first objective, there is provided a wafer inspection system including an apparatus for selectively inspecting conductive pattern defects, which includes a sensor for scanning the surface of a wafer in a noncontact manner and an RLC circuit which is connected to the sensor and converts a signal obtained from the sensor into an electrical characteristic signal. An image processing computer, which is connected to the apparatus, selectively inspects conductive pattern defects. Preferably, the wafer includes a conductive pattern and the sensor is a capacitor sensor.
In the apparatus for selectively inspecting conductive pattern defects, the electrical characteristic is obtained from the variation of resonance frequency. The electrical characteristic signal can be any of the group consisting of voltage, current and power characteristics. Accordingly, it is preferable that the RLC circuit includes a detector for detecting the variation of the electrical characteristic and an alternating current voltage source.
The image processing computer converts the electrical characteristic signal, which is received from the apparatus for selectively inspecting conductive pattern defects, into a two dimensional image and processes the two dimensional image. The image processing computer may include a review station for performing classification with respect to the image processing results.
To achieve the other objective, there is provided a method for selectively inspecting conductive pattern defects using a wafer inspection system. Primarily, a wafer having a conductive pattern is positioned in the wafer inspection system. The wafer is scanned using a sensor of an apparatus for selectively inspecting conductive pattern defects. A signal obtained from the sensor is converted into an electrical characteristic signal using an RLC circuit of the apparatus for selectively inspecting conductive pattern defects. The variation of the electrical characteristic signal is converted into a two dimensional image and defects are finally detected using an image processing computer. Preferably, the sensor is a capacitor sensor and the capacitor sensor scans the wafer in a noncontact manner.
It is preferable that the defects processed in the image processing computer are finally classified in a review station which is provided in an in-line or off-line manner.
According to the present invention, when inspecting a wafer having a conductive pattern using a wafer inspection system, only conductive pattern defects, which can be fatal to chips on the wafer, are selectively sensed, thereby reducing time, human power and cost which are required for checking and classifying nonconductive defects, which do not significantly influence the operation of a circuit on chip. In addition, instead of depending on sensing images of entire defects, the present invention senses only conductive pattern defects using an electrical signal, thereby optimally implementing a wafer inspection system suitable for highly integrated semiconductor devices in which detection of defects of minute sizes is required, without regard to the improvement of resolution.